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InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links
Robert Elvis Makon
2006
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In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 GHz. The outstanding and (to some extent) record achievements throughout the work make an essential contribution to the development of future optical telecommunication networks operating at 80 Gbit/s.
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Keywords
- Clock and data recovery
- InP DHBT
- Optical link
- Phase detector
- phase-locked loop
Links
DOI: 10.5445/KSP/1000004568Editions